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【Qualifications】
- Responsible for the design and development of the upper computer control software and GUI;
- Responsible for upper computer software version iteration and maintenance;
- Responsible for counting documents.
【Education/Experience】
- majoring in computer, software engineering, or other science and technology, with bachelor degree or above;
- solid C/C++ skills, some GUI development experience, familiar with Qt is preferred;
- Good GUI aesthetics;
- Strong sense of responsibility, good teamwork and communication skills.
【Qualifications】
- Design analog circuits, such as Bandgap, LDO, PLL, ADC / DAC ;
- Write the design and simulation report ;
- Simulation chip testing.
【Education/Experience】
- Bachelor degree or above in microelectronics / integrated circuit related majors ;
- Familiar with integrated circuit design and manufacturing process ;
- have a more solid basic knowledge of analog electronic circuits ;
- master Hspice / Spectre simulation design tools ;
- Cheerful personality, careful work.
【Qualifications】
- Understand the working principle of the chip, output the chip CP test plan ;
- CP test program development and debugging ;
- To solve the CP test hardware problems, such as probe card schematic design, Layout check ;
- Engineering batch chip test, output CP test report, test efficiency improvement program.
【Education/Experience】
- Bachelor degree, major in electronics, physics, automation, microelectronics or other related ; 1 year and above chip ATE test experience, understand dToF, image sensor ATE test method, process is preferred ;
- Have ATE test platform ( such as J750, chroma3380, etc. ) test program writing, test pattern import, machine operation experience ;
- CP-related hardware import experience, such as probe card schematic design, Layout check ;
- Have data statistical analysis ability, can use python, matlab and other data analysis software ;
- Skillfully use common test instruments, such as multimeter, oscilloscope, waveform generator, etc. ;
- Have strong learning ability, communication ability and problem analysis ability.
【Qualifications】
- Responsible for completing the physical design of Netlist to GFDSII ;
- Responsible for the writing and maintenance of relevant technical documents.
【Education/Experience】
Basic conditions :
- Bachelor degree or above in computer, electronics, microelectronics, communications and other related majors ;
- Familiar with the back-end design process and tools, with the experience of the entire back-end process from Netlist to GDSII.
- Experience in SPI, I2C, MIPI CSI interface design ;
- Successful tape-out experience.
【Qualifications】
- responsible for writing RTL and netlist related verification documents for chip projects and developing module-level and system-level verification schemes for digital circuits;
- perform module and SoC system level verification work using hardware design verification languages/tools such as Verilog, SystemVerilog, UVM/OVM/VMM verification methodologies to achieve efficient chip functionality;
- improve verification environment and verification scripting tools (Shell/Perl/Tcl/Makefile), and maintain verification flow to work with chip design engineers to find and fix design defects;
- completing RTL-level simulation and gate-level timing (with backscale) simulation to complete verification execution and Debug to meet TapeOut requirements;
- Be able to generate test plans, generate code and functional coverage, and write verification reports according to project requirements.
【Education/Experience】
- Electronics, communication, computer, microelectronics or physics and other related majors, bachelor degree or above ;
- Familiar with digital IC design process, familiar with UVM / VMM / OVM verification methodology, master Verilog System Verilog / SVA hardware design verification language ;
- Familiar with the Linux working environment, skilled use of scripting language design tools and environment development such as Makefile, Perl, Shell TCL ;
- Skillfully use simulation and debugging tools, such as VCS, NCSIM, Verdi, etc. Have digital-analog hybrid verification experience, can build a hybrid simulation verification platform, and complete debugging ;
- Has strong learning ability, communication ability and good teamwork spirit, excellent independent analysis and processing ability.
【Qualifications】
1.Participate in chip architecture design and SPEC development ;
2.Responsible for the digital front-end design and development work in the chip design project, including RTL design, RTL verification, formal verification, RTL synthesis, timing verification, DFT / ATPG, etc., to achieve chip function and performance requirements ;3.Cooperate with the back-end engineer to complete the layout ; guide the back-end design and related inspection and post-simulation ;
4.participate in the development of chip test plan and support test engineers to complete chip test work ;
5.Responsible for the preparation of relevant technical documents.
【Education/Experience】
1. electronics, communications, computer, microelectronics or physics and other related professional ;
2.Proficiency in Verilog language programming, a solid foundation of digital circuits ;
3.Familiar with digital chip design and development process, skilled use of commonly used EDA tools, successful tapeout experience is preferred ;
4.Image sensor development experience, image processing algorithm, TDC / ADC calibration algorithm development experience is preferred ;
5.with strong learning ability, communication skills and good team spirit.